Grand Challenges - uGC3 - Moore for Less
Tuesday, September 30, 2008 9:00 am - 5:00 pm
Computer Labs
William Gates Building
15 JJ Thomson Avenue
Cambridge, Cambs CB3 0FD
United Kingdom
The Electronics KTN introduces the fifth in our “Grand Challenges” Series of events. Having set the stage with the introductory event held back in March, this event explores in detail the Moore For Less theme identified in the Grand Challenges report.
The objective of the Moore For Less Grand Challenge is to develop advances in technology and design that continue to deliver improvements in component density, performance, and cost-per-function in-line with Moore's Law whilst reversing the trend of past advances for electronics to demand an ever increasing share of the world's energy resources. These advances will be hard-won because of the adverse pressures of device variability, the end of advances in instruction level parallelism (ILP), the difficulties of designing with high levels of concurrency, and the challenges of designer productivity. This GC is very much in line with the ITRS, (International Technology Roadmap for Semiconductors) except that we now demand that the performance improvements come at no increase in power.
This grand challenge focuses on the concept of delivering "more for less": steering Moore's law through (or round) the various technology barriers that are becoming increasingly formidable. This is vital in moving the basic premise of Moore's law away from raw transistor numbers into a more sophisticated metric of performance in the future.
A key aspect of achieving such progress is the design (productivity) gap, a vital component in making progress and an area where the UK design community has a lot to offer.
Learn and Network
Delegates at this free event will not only have the benefit of learning about state-of-the-art academic research in the UK into the areas of micro power management and generation but will also have the opportunity with a wide selection of academics, technologists from SMEs and large companies, investors and government.
Delegates will be invited to participate in joint industry/academic interactive workshops aimed at identifying potential academic research projects that could further the UK's expertise in the field.
Delegates need not necessarily have the resources to fund, or even participate directly in academic research, but should have at least a moderate interest in understanding and influencing the outcomes of such research.
Desired Outcomes
By bringing together a representation from UK academia with a similar representation from UK industry, the Electronics KTN hopes to stimulate the identification of further academic research projects that could be funded by EPSRC. We also hope that the events may stimulate some industry-academia collaborations. Building on the platform of these events we hope to establish a community of UK industry that has an interest in influencing the shape of research in this area and can ultimately provide a response to this project in the form of a set of “unmet needs” from an industry perspective. We will use these events to build that community and gather volunteers to participate in such a forum.
Find out more about the Grand Challenges programme and the other events in this event programme: Click Here
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